Cypress Semiconductor /psoc63 /SMIF0 /DEVICE[2] /WR_ADDR_CTL

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Interpret as WR_ADDR_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WIDTH

Description

Write address control

Fields

WIDTH

Width of transfer.

Links

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